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TMS320C5515
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15
SPRS645F – AUGUST 2010 – REVISED OCTOBER 2013
Figure 3-1. LDO Control Register (LDOCNTL) [7004h]
8
Reserved
R-0
7
Reserved
2
1
DSP_LDO_V
0
USB_LDO_EN
R-0
LEGEND: R/W = Read/Write; R = Read only; - n = value after reset
Table 3-2. LDOCNTL Register Bit Descriptions
BIT
15:2
1
0
NAME
RESERVED
DSP_LDO_V
USB_LDO_EN
DESCRIPTION
Reserved. Read-only, writes have no effect.
DSP_LDO voltage select bit.
0 = DSP_LDOO is regulated to 1.3 V.
1 = DSP_LDOO is regulated to 1.05 V.
USB_LDO enable bit.
0 = USB_LDO output is disabled. USB_LDOO pin is placed in high-impedance (Hi-Z) state.
1 = USB_LDO output is enabled. USB_LDOO is regulated to 1.3 V.
Table 3-3. LDO Controls Matrix
RTCPMGT Register
(0x1930)
BG_PD Bit LDO_PD Bit
LDOCNTL Register
(0x7004)
USB_LDO_EN Bit
DSP_LDO_EN
(Pin D12)
ANA_LDO
DSP_LDO
USB_LDO
1
Don't Care
0
0
0
Don't Care
1
0
0
0
Don't Care
Don't Care
0
0
1
Don't Care
Don't Care
Low
High
Low
OFF
OFF
ON
ON
ON
OFF
OFF
ON
OFF
ON
OFF
OFF
OFF
OFF
ON
Copyright ? 2010–2013, Texas Instruments Incorporated
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